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Technical CMOS PLL Synthesizers: Analysis and Design (The International Series in Engineer

Posted on 2010-03-15




Name:Technical CMOS PLL Synthesizers: Analysis and Design (The International Series in Engineer
ASIN/ISBN:0387236686
Author:Keliu Shu, Edgar S�nchez-Sinencio
Publisher:Springer
Publish Date:12 November, 2004
Language:English
File size:50 Mb
   Technical CMOS PLL Synthesizers: Analysis and Design (The International Series in Engineer

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  • Author: Keliu Shu, Edgar S�nchez-Sinencio
  • Publisher: Springer
  • Publish Date: 12 November, 2004
  • ISBN: 0387236686
• Hardcover: 215 pages

• Publisher: Springer; 1 edition (November 12, 2004)

• Language: English

• ISBN: 0387236686

• List Price: $119.00

This book presents both fundamentals and the state of the art of PLL synthesizer design and analysis techniques. A complete overview of both system-level and circuit-level design and analysis are covered. A 16mW, 2.4GHz, sub-2V, Sigma Delta fractional-N synthesizer prototype is implemented in 0.35m m CMOS. It features a high-speed and robust phase-switching prescaler, and a low-complexity and area-efficient loop capacitance mulitplier, which tackle speed and integration bottlenecks of PLL synthesizer elegantly.

This book is conceived as a PLL synthesizer manual for both academia researchers and industry design engineers.

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